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Embedded Systems: ARM SWD Protocol1

Embedded Systems: ARM SWD Protocol

Overview

ARM Debug Infrastructure, SWD as communication Protocol

ARM Debug Infrastructure, SWD as communication Protocol.

SWD (Serial Wire Debug) is an ARM-based protocol created as an alternative to the JTAG protocol, allowing communication with ARM DAP.

ARM DAP consists of two modules: DP (Debug Port) and AP (Access Port). SWD protocol is mainly used to communicate with the DP part (this path is known as the SWD-DP path). DP is used to select the appropriate AP and read/write data through the selected AP.

Pinout

SWD is a 2-pin interface (SWDIO/SWCLK). The protocol uses a bi-directional line for data (known as SWDIO) and one clock line (SWCLK) to sample the data coming on the bi-directional line.

In terms of physical connection, these pins are added on top of the existing JTAG connector as shown below:

SWD Physical Connector

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Protocol Description

Each sequence of operations on the wire consists of two or three phases:

  1. Packet request:

The external host debugger issues a request to the DP. The DP is the target of the request.

  1. Acknowledge response:

The target sends an acknowledge response to the host.

  1. Data transfer phase:

This phase is only present when either:

- A data read or data write request is followed by a valid (OK) acknowledge response.

- The ORUNDETECT flag is set to 1 in the CTRL/STAT Register (see The Control/Status Register, CTRL/STAT).

The data transfer is one of:

- target to host, following a read request (RDATA)

- host to target, following a write request (WDATA).

Example of SWD write operation on SWD lines

SWD Write Operation (SWD-DP)

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JTAG vs SWD

JTAG Pros:

  • Widely used in multiple devices and processor families (not limited to ARM like SWD).
  • Offers more functionalities besides debugging, such as Boundary Scan testing, PCB fault detection, etc.

JTAG Cons:

  • Requires more pins than SWD, so it's not suitable for systems with limited pinout resources.
  • More sophisticated in terms of implementation compared to SWD (requires a state machine implementation on the TAP level).

SWD Pros:

  • Requires fewer pins, only two pins (SWCLK/SWDIO).
  • Faster than JTAG.

SWD Cons:

  • Limited functionalities compared to JTAG (used only for debugging).
  • Not always reliable/stable when used for long durations.
  • Limited to ARM-based chips.